Hierarchical Krylov subspace based reduction of large interconnects

The text is written in October 2008 for the http://groups.google.com/group/mor4ansys group.

Sheldon Tan has many papers on model reduction


One of the interesting topics that he is working on is hierarchical model reduction [1][2]. Once Tamara and I have tried to develop somewhat similar for a thermal problem [3] but it did not went too well. So I have asked Sheldon for his preprint [1] to see how he has solved his problem. The conference paper [2] that is available online on his homepages gives a short overview of the method.

I like the preprint [1] very much. It is well written in a logic and didactic manner. The main idea is to partition the original system to subsystems, then to make model reduction for each subsystem and then combine them back together. The key along this way is to consider coupling between the two subsystems as additional inputs. Then one can use the PRIMA-based MOR for each subsystems without changes. In the paper there is a proof that provided each subsystem matches m moment, the final subsystem will match m moments as well. The preservation of passivity is also considered.

However, the number of inputs should not be too big. This is vital for the success of the method, as the dimension of the reduced system grows proportionally with the number of inputs. In the paper this problem is solved by using hMETIS to partition the original circuit. And this is the key difference between circuit and thermal models: unfortunately for a thermal model this will not work.

Hence the question how it would be possible to use this method for a thermal system becomes equivalent to how to reduce the number of nodes connecting thermal subsystems (see also [3]). So far I have not seen a clear answer. It certainly can be done based on intuition (see for example [4]) but it would be good to find some formal way to achieve it. Among Seldon’s papers there is a paper on how to do it for circuits [5]. It would be interesting to see if this could be applied for thermal systems as well.

[1] D. Li, S. X.-D. Tan, L. Wu, Hierarchical Krylov subspace based reduction of large interconnects, Integration, The VLSI Journal (in press).

[2] D. Li, S. X.-D. Tan, Hierarchical Krylov subspace reduced order modeling of large RLC circuits, Proc. Asia South Pacific Design Automation Conference (ASP-DAC’08), pp.170-175, Seoul, Korea, Jan. 2008.

[3] T. Bechtold, E. B. Rudnyi, J. G. Korvink, M. Graf, A. Hierlemann. Connecting heat transfer macromodels for MEMS-array structures. Journal of Micromechanics and Microengineering 2005, v. 15, N 6, p. 1205-1214.

[4] A. Augustin, T. Hauck. Transient Thermal Compact Models for Circuit Simulation. Paper 2.5.3. 24th CADFEM Users’ Meeting 2006, International Congress on FEM Technology with 2006 German ANSYS Conference, October 25-27, 2006 SchwabenlandhalleStuttgart/Fellbach, Germany.
Available online, please follow the link on

[5] P. Liu, S. X.-D. Tan, B. Yan, B. McGaughy, An efficient terminal and model order reduction algorithm, Integration, the VLSI Journal, vol.41, no.2, pp.210-218, Feb. 2008.

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